Toshiba Electronics Europe GmbH has introduced a new photorelay, the TLP3475W, designed to minimize insertion loss and mitigate power attenuation of high-frequency signals. This device is specifically targeted for applications in semiconductor testing, such as high-speed memory testers, high-speed logic testers, and probe cards.
The TLP3475W incorporates an optimized package design that reduces parasitic capacitance and inductance, resulting in decreased insertion loss for signals within the 20GHz frequency range. Compared to its predecessor, the TLP3475S, the TLP3475W offers a 1.5x performance improvement in this aspect.
The photorelay is driven by a low current (IFT) of less than 3.0mA, and its on-state resistance (RON) typically measures 1.1Ω. It provides an isolation voltage (BVs) that surpasses 300Vrms and exhibits an output capacitance (COFF) of less than 20pF, contributing to swift switching times of around 2ms. The device functions as a normally open (NO) / 1-Form-A relay.
The TLP3475W is housed in a compact WSON4 package, which measures approximately 1.45mm x 2.0mm x 0.8mm (typical dimensions). This makes it one of the smallest photorelays currently available in the market, being 40% smaller than Toshiba's ultra-compact S-VSON4T package. Its compact size is particularly advantageous in multi-channel designs where multiple devices are utilized on a single card.
With an operating temperature range of -40ºC to +110ºC, the TLP3475W is well-suited for industrial applications, including high-speed semiconductor testing.